Data rates in electronic systems in general and digital systems in particular continue to increase. High data rates leave little margin for error in aligning clock signals to data signals. Alignment errors between clock signals and data signals increase the bit-error-rate (BER) in a system. Systems that have high BERs sometimes retransmit bits that are in error. Unfortunately, the retransmission of bits reduces a system's effective bandwidth.
Skew is any unintended alignment error between signals in a system. Skew has many different sources. For example, mismatches between the lengths of transmission lines that carry clock signals and the lengths of transmission lines that carry data signals can cause skew between the clock signals and the data signals. In another example, mismatched turn-on and turn-off times between the circuits that drive clock signals and the circuits that drive data signals can cause skew between the clock signals and the data signals. Finally, a voltage fluctuation on a bus that supplies power to circuits that generate clock signals or data signals can cause skew between the clock signals and the data signals.
Controlling skew sources is one method of reducing skew between clock signals and data signals. For example, transmission line lengths can be measured and trimmed to match transmission line lengths for clock signals to transmission line lengths for data signals. Circuits that drive clock signals and circuits that drive data signals can be individually selected to have substantially identical electrical properties. Finally, power supply voltages can be filtered and controlled to reduce or eliminate power supply fluctuations. Unfortunately, controlling skew sources is an unsatisfactory method for reducing skew because it is both difficult and expensive.
For these and other reasons there is a need for the present invention.